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authorClément DAVID <clement.david@scilab.org>2010-03-18 15:29:20 +0100
committerClément DAVID <clement.david@scilab.org>2010-03-18 15:29:20 +0100
commitbacfee43920dd7acc4cd53a0788672f4bc783961 (patch)
tree51a21a70f697aeb9abbb06bf5568bcf30b2a80d5 /scilab/modules/scicos
parent8533f745a2d17fe18e36e7a28c21434a13ceba07 (diff)
downloadscilab-bacfee43920dd7acc4cd53a0788672f4bc783961.zip
scilab-bacfee43920dd7acc4cd53a0788672f4bc783961.tar.gz
Xcos: Oupss remove partial merge (restore the previous version)
Diffstat (limited to 'scilab/modules/scicos')
-rw-r--r--scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci34
1 files changed, 0 insertions, 34 deletions
diff --git a/scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci b/scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci
index 71f5abf..a75b650 100644
--- a/scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci
+++ b/scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci
@@ -94,7 +94,6 @@ function bad_connection(path_out,prt_out,nout,outtyp,path_in,prt_in,nin,intyp,ty
94 path_out=path_out(k(1)) // "from" block number 94 path_out=path_out(k(1)) // "from" block number
95 path_in=path_in(k(1)) // "to" block number 95 path_in=path_in(k(1)) // "to" block number
96 96
97<<<<<<< HEAD:scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci
98 if path==[] then 97 if path==[] then
99 //** hilite_obj(scs_m.objs(path_out)) //** set 98 //** hilite_obj(scs_m.objs(path_out)) //** set
100 hilite_obj(path_out); //** 99 hilite_obj(path_out); //**
@@ -200,39 +199,6 @@ function bad_connection(path_out,prt_out,nout,outtyp,path_in,prt_in,nin,intyp,ty
200 //** unhilite_obj(scs_m.objs(path(1))) //** 199 //** unhilite_obj(scs_m.objs(path(1))) //**
201 unhilite_obj(path(1)) 200 unhilite_obj(path(1))
202 end 201 end
203=======
204 xcosShowBlockWarning(path_out); //** new
205 msg = [];
206 if typ==0 then
207 msg = ['Hilited block(s) have connected ports ';
208 'with incompatible sizes';
209 ' output port '+string(prt_out)+' size is :'+sci2exp(nout);
210 ' input port '+string(prt_in)+' size is :'+sci2exp(nin)];
211 else
212 msg = ['Hilited block(s) have connected ports ';
213 'with incompatible type';
214 ' output port '+string(prt_out)+' type is :'+sci2exp(outtyp);
215 ' input port '+string(prt_in)+' type is :'+sci2exp(intyp)];
216 end
217
218 if path==[] then
219 errorDiagramPath(path, [path_out, path_in], msg, "", %t);
220 else
221 errorDiagramPath(path, [path_out, path_in], msg, "", %t);
222 end
223 xcosClearBlockWarning(path_out); //** new
224 else // connected links do not verify block contraints
225 mess=prt_out;
226 xcosShowBlockWarning(path_out); //** new
227 if type(path_out)==15 then //problem with implicit block
228 message('Problem with the block generated from modelica blocks')
229 else
230 path=path_out(1:$-1) // superbloc path
231 path_out=path_out($) // block number
232 errorDiagramPath(path, path_out, mess, "", %t);
233 end
234 xcosClearBlockWarning(path_out); //** new
235>>>>>>> origin/5.2:scilab/modules/scicos/macros/scicos_scicos/bad_connection.sci
236 end 202 end
237 end 203 end
238 204